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Start and Debug lmgrd and xilinxd
This post shows and explains commands to start a license manager (lmgrd), look up its port, find its peer (xilinxd), etc.

2022.2 Vivado, Vitis, & Petalinux Downloads and Info
A comprehensive 2022.2 Vivado, Vitis, & Petalinux post: Downloads, BSPs, VMs, and required Linux packages.

What does a9-linaro-pre-build-step do?
This post answers, "What does a9-linaro-pre-build-step do?" and provides additional information that may help debuggers....

XSDK 2015.4 source settings64.sh Trace
This post shows an XSDK 2015.4 source settings64.sh trace. Other script sourcing and environment changes are in bold.


How do I workaround the Web Installer Client Obsolete error?
This post answers, "How do I workaround the "Web Installer Client Obsolete" error?"


Where can I get the 2015.4 Xilinx SDK?
This post answers the question, "Where can I get the 2015.4 Xilinx SDK?" These steps were created and verified on July 8th, 2024.


XCVU9P-L2FLGA2104E Decode and Its Features
This post lists a XCVU9P-L2FLGA2104E decode and its features.


"About Vitis IDE" - a Wealth of Information
After clicking About Vitis IDE, this post shows examples of all the information available in each sub-menu. The info at Installation Details

What does BIF stand for? What does PDI stand for? Describe the "Create Versal Boot Image Screen" v2023.1
This post answers what BIF stands for (Boot Image Format) and what PDI stands for (Programmable Device Image). It also lists links to...


PMC vs. PSM?
This post discusses the AMD Versal PMC vs. PSM. At a high level, the PMC (Platform Management Controller) controls boot, and the PSM...

Cached and OCR'd Links to Every Xcell Journal Article
This page lists links to a cached version of every Xcell Journal article. In addition, OCR is used in every article.

Links to Every Xcell Journal Article
This page lists links to every Xcell Journal article hosted @ www.xilinx.com.


Create a Versal PLM project and build it with Vitis Classic
This post shows how to create a Versal PLM with Vitis Classic (versions ≤2023.1, or 2023.2 when launched with the `-classic` command line...


Create a Versal boot image and launch PLM on hardware
Once you’ve created a PLM elf, the next step is to create a boot image from it, and then boot it.

Running a local Xilinx license server to use a floating license
Running a local Xilinx license server to use a floating license


Create a Versal PLM project and build it with XSCT
Create and build a Versal PLM


Versal Glossary
Details on abbreviations, acronyms, and other terms. In this post, *O means that a component is optional and is not present in every...

Extract (read back) configuration data from a Zynq-7000 FPGA
Introduction This article will show you how to use Vivado to read back the bitstream programmed into a physical Zynq-7000 device. The...

How To Start the Vivado License Manager From the Linux and Windows Command Line
This post shows how to start the Vivado License Manager from the Linux and Windows Command Line. How To Start the Vivado License Manager...

XCVC1902-2MSEVSVA2197 At-A-Glance
Note: This post covers XCVC1902-1MSEVSVA2197, which differs from the current chip XCVC1902-2MSEVSVA2197 used on the EK-VCK190-G only in...

Is "xsetup.exe" Giving You the Silent Treatment? Let's Solve That Mystery! 😱
Ever clicked on 'xsetup.exe' only to be met with... silence? You're not alone. In fact, there's a sneaky culprit behind this that's...

Unraveling Xilinx UltraScale+ MPSoC Linux Boot Errors: A Deep Dive
Curious about debugging those elusive Xilinx UltraScale+ MPSoC Linux boot errors? Dive into this post and uncover the secret behind the...

Launching Bitbake in a 2023.1 PetaLinux Environment: A Guide Post-petalinux-build.
This post shows how to launch bitbake from a 2023.1 PetaLinux environment after a successful petalinux-build of...

Breaking Down a Bitbake Line: The 'do_compile' Step for Xilinx Linux with petalinux-build
This post shows a single line of bitbake output decoded, specifically the do_compile step of the Xilinx Linux kernel as started via...
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